DisplayPort
The I/O Board provides a 2-lane DisplayPort. Lanes 2 and 3 of the DisplayPort are not connected internally.
| Pin | Signal Name |
|---|---|
| 1 | ML_Lane0 (p) |
| 2 | GND |
| 3 | ML_Lane0 (n) |
| 4 | ML_Lane1 (p) |
| 5 | GND |
| 6 | ML_Lane1 (n) |
| 7 | ML_Lane2 (p) |
| 8 | GND |
| 9 | ML_Lane2 (n) |
| 10 | ML_Lane3 (p) |
| 11 | GND |
| 12 | ML_Lane3 (n) |
| 13 | CONFIG1 |
| 14 | CONFIG2 |
| 15 | AUX CH (p) |
| 16 | GND |
| 17 | AUX CH (n) |
| 18 | Hot Plug Detect |
| 19 | Return |
| 20 | DP_PWR |
