ACPI Sleep States (S0 - S5)

Under the G1 sleeping state ACPI defines levels of system sleep state support. The CX8 supports the following sleeping states:

• S0: Normal Powered-On state
• S1 (Standby): The S1 sleeping state is a low wake latency sleeping state. In this state, no system context is lost (CPU or chip set) and hardware maintains all system contexts.
  Note The CX8 does not support S1 state. Turning off the backlight and hard drives provides the equivalent power savings (due to Intel's processor C-states feature) at nearly zero latency.
• S2: Not supported
• S3 (Suspend to Ram): The S3 sleeping state is a low wake latency sleeping state. This state is similar to the S1 sleeping state except that the CPU and system cache context is lost (the OS is responsible for maintaining the caches and CPU context). Control starts from the processor's reset vector after the wake event. In NCR systems, during S3, power is only provided to the USB 3.0 ports.
  Note When the terminal resumes from an S3 state, all the USB devices re-enumerate. This causes speaker tones as if they were disconnected and then reconnected. This does not present a problem and the USB devices will continue to operate correctly.

  Requirements for S3 support:

  • O/S must be built on a system with S3 enabled in the BIOS
  • Some peripherals may not be S3 capable, which can prevent the system from entering S3 state.
• S4 (Suspend to Disk): The S4 state is the lowest power, longest wake latency sleeping state supported by ACPI. In order to reduce power to a minimum, it is assumed that the hardware platform has powered off all devices. Platform context is maintained.

  Requirements for S4 support:

  • O/S must be built on a system with S3 enabled in the BIOS
  • Some peripherals may not be S4 capable, which can prevent the system from entering S4 state.

  Reference the ACPI Specification for details.

Peripherals: ACPI defines power states for peripherals which are separate from the system power state. The device power states range from D0 (fully-on) to D3 (off) It is the responsibility of the driver developer for each peripheral to define and support the available power states.